module top_module(
    input clk,
    input reset,    // Synchronous reset
    input in,
    output disc,
    output flag,
    output err);

    parameter none=4'd0;
    parameter one=4'd1;
    parameter two=4'd2;
    parameter three=4'd3;
    parameter four=4'd4;
    parameter five=4'd5;
    parameter six=4'd6;
    parameter error=4'd7;
    parameter discard=4'd8;
    parameter flag_=4'd9;
    
    reg [3:0] state;
    reg [3:0] next_state;
    
    always@(posedge clk)
        if(reset)
            state<=none;
        else
            state<=next_state;
    
    always@(*)
        case(state)
            none   :next_state=in?one:none;
            one    :next_state=in?two:none;
            two    :next_state=in?three:none;
            three  :next_state=in?four:none;
            four   :next_state=in?five:none;
            five   :next_state=in?six:discard;
            six    :next_state=in?error:flag_;
            error  :next_state=in?error:none;
            discard:next_state=in?one:none;
            flag_  :next_state=in?one:none;
        endcase
    
    assign disc = state == discard;
    assign flag = state == flag_;
    assign err  = state == error;

endmodule
